Engineering and infrastructure

AI accelerators and hardware co-design

AI accelerators and hardware co-design is the work of shaping chips and compute architectures around the demands of AI workloads. AI companies need it when off-the-shelf hardware limits how fast, how cheaply or how far their models can run.

Compute is now one of the biggest constraints on what an AI company can build, so more teams want a say in the hardware underneath their models. The hires are tricky because the skills sit between disciplines. A strong chip designer may not understand model behaviour, and a strong ML engineer may not understand silicon. Look for people who can reason across both and explain the trade-offs plainly.

Hiring now 3Emerging 1

Roles in this family

4 roles

Hiring nowAI Accelerator ArchitectAn AI Accelerator Architect decides how a chip or compute system should be built for specific training or inference workloads. Their choices set the…Hiring nowAI Hardware Verification EngineerAn AI Hardware Verification Engineer proves that accelerator logic and its interfaces behave correctly before silicon is committed. Escaped defects…Hiring nowHardware-Software Co-Design EngineerA Hardware-Software Co-Design Engineer shapes model software and chip interfaces together, so neither is tuned in isolation. For an AI company, that…EmergingNeuromorphic Computing ResearcherA neuromorphic computing researcher tests whether event-driven, brain-inspired computation can beat conventional hardware on a real task. The answer…

Where the people come from

Computer architecture, electrical engineering or chip design

Not to be confused with. Facilities and software compilers remain separate ownership areas.

Core skills

  • Linear algebra and optimisation
  • GPU programming
  • Simulation and digital twins
  • Hardware and computer architecture

Where it is used

  • Semiconductors and compute infrastructure

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