Hiring nowAI accelerators and hardware co-design

Hardware-Software Co-Design Engineer

Also called AI Co-Design Engineer

A Hardware-Software Co-Design Engineer shapes model software and chip interfaces together, so neither is tuned in isolation. For an AI company, that means more performance from the compute it already pays for or plans to build.

What they do

Work starts with profiling real model workloads to see where time, memory and energy go. From there the engineer proposes changes on both sides of the interface: model structure, numerics, kernels, compilers, memory hierarchy, interconnect or instruction support. They test ideas in hardware simulators and digital twins, write or modify RTL where needed, and run EDA flows to check feasibility. They sit between model researchers, kernel engineers and chip architects, and translate each group's constraints for the others. Findings go into design proposals backed by measurements.

What a strong hire delivers

In the first months, a strong hire delivers a clear, measured picture of where the current workloads lose efficiency. They produce a joint design proposal that model and hardware teams both accept. They build a prototype, in simulation or on silicon, that shows system-level gains over baselines tuned separately. They also leave behind repeatable experiments and shared profiling methods the team can reuse.

How you can tell they are good

Ask them to walk through one co-design decision from end to end: the workload, the profile, the options, what they measured and what they gave up. Strong people show numbers, explain why a baseline was fair, and describe ideas that failed. Ask them to explain a hardware constraint to a model researcher. Be wary of anyone who only optimises one side.

Why it is hard to fill

The title is rare and rarely matches what people have held. Most candidates are strong on one side, either architecture and chip design or GPU and model performance, and few have worked fluently across both. The best are usually already embedded in teams that value them, so they are not looking. Job specs that demand deep skill in everything shrink an already small pool.

Where to find them

Look in computer architecture and chip design teams who have worked close to machine learning workloads. Also look at performance engineers, GPU kernel and compiler engineers who have moved towards hardware. Common sources are accelerator start-ups, established chip makers, frontier labs with in-house silicon, cloud providers and university research groups in architecture and systems.

Indicative pay

Not enough published evidence yet to give a fair range for this role, which is common for work this new. We benchmark it for you as part of a search.

Interview questions for a Hardware-Software Co-Design Engineer

  1. Tell us about a project where you changed both the software and the hardware design to improve a workload. What drove the decision?

    A strong answer names the workload, the profiling evidence and the trade-offs on each side. They explain why co-design beat tuning separately. Worry if they describe only one side, or credit gains without any measurement.

  2. How do you build a fair independently optimised baseline to compare a co-designed system against?

    Good answers give each side a real tuning effort, fix workloads and metrics up front, and guard against flattering comparisons. Worry about weak baselines, cherry-picked workloads or reporting a single metric.

4 more questions, with what a strong answer covers, are in the Role Kit.

Job description you can post

We design our model software and compute hardware together. We are looking for a Hardware-Software Co-Design Engineer to find the changes across both that give real system-level gains. You will work with model researchers, kernel engineers and chip architects, and turn measurements into designs we can build.

What you will do

  • Profile real model workloads to find limits in compute, memory and energy
  • Propose joint changes to model software and hardware interfaces
  • Run co-design experiments in simulators and digital twins
  • Write and modify RTL and run EDA flows to test feasibility
  • Build measured prototypes and compare them to independently optimised baselines
  • Write design proposals that model and hardware teams can act on

What you will bring

  • Demonstrated work improving performance across a software and hardware boundary
  • Strong grounding in computer architecture
  • Hands-on GPU programming experience
  • Comfort with linear algebra and optimisation as applied to model workloads
  • Experience with RTL, hardware simulators or EDA tools
  • Clear written and spoken communication across disciplines

Nice to have

  • Experience with workload profilers at scale
  • Work on custom accelerators or numeric formats
  • Published or shared design studies

Free to use and adapt. If it saves you time, a link back to this page is appreciated.

Skills that matter

  • Hardware and computer architectureAdvancedDesign computing structures and hardware interfaces
  • GPU programmingAdvancedOptimise parallel accelerator kernels
  • Linear algebra and optimisationWorkingReason about matrix operations and objective functions
  • Simulation and digital twinsWorkingBuild useful virtual representations of environments

Other roles in aI accelerators and hardware co-design

Hiring nowAI Accelerator ArchitectAn AI Accelerator Architect decides how a chip or compute system should be built for specific training or inference workloads. Their choices set the…Hiring nowAI Hardware Verification EngineerAn AI Hardware Verification Engineer proves that accelerator logic and its interfaces behave correctly before silicon is committed. Escaped defects…EmergingNeuromorphic Computing ResearcherA neuromorphic computing researcher tests whether event-driven, brain-inspired computation can beat conventional hardware on a real task. The answer…

Related roles in other families

Hiring nowAI Inference Compiler EngineerAI compilers, kernels and runtime systemsAn AI Inference Compiler Engineer makes trained models run faster and cheaper on real hardware. They change how model computation is compiled and…Hiring nowGPU Kernel EngineerAI compilers, kernels and runtime systemsA GPU Kernel Engineer writes and tunes the low-level code that runs model operations on accelerators. Faster, correct kernels cut compute cost and…Hiring nowML Runtime EngineerAI compilers, kernels and runtime systemsAn ML Runtime Engineer builds the scheduling, memory and execution layer that runs models on real hardware. Their work decides whether a model…EmergingAI Performance Portability EngineerAI compilers, kernels and runtime systemsAn AI Performance Portability Engineer keeps models fast and accurate across different hardware. They cut dependence on one chip or vendor, which…

How we wrote this

Role definitions are our own editorial work, checked against occupational classifications, standards, research and employer pages. Titles vary by company, and this is a description of the work, not a job advert.

← AI accelerators and hardware co-designAll new job families

Start a search

Hiring a Hardware-Software Co-Design Engineer?

Tell us the work. We find the people already doing it, whatever their job title says, and you meet them already interviewed for your role.